This year, Samsung Electronics and TSMC are making every effort to secure yields for the 2-nanometer process, expected to be the biggest battleground in the cutting-edge foundry (semiconductor contract manufacturing) market. As of now, TSMC is said to be closer to the mass production yield, leading Samsung Electronics, but unlike the 3-nanometer setbacks, Samsung Electronics is reportedly having a relatively smooth experience with the 2-nanometer process.
According to the industry on the 26th, TSMC's 2-nanometer process yield has exceeded 60% and is expected to expand production capacity above previous levels. TSMC is scheduled to begin mass production of the 2-nanometer process by the end of this year. While Samsung Electronics also aims for mass production within this year, there is a possibility that the production timeline could be pushed to next year depending on yield conditions.
On this day, the Taipei Times quoted a TSMC official saying, "Given that TSMC's yield is better than expected, we are pushing to increase the final monthly production capacity target to 100,000 wafers." It is projected that the monthly production capacity will increase from 50,000 wafers to a maximum of 80,000 wafers by the end of this year.
To mass-produce chips based on client orders, securing a yield of around 70% is essential. The industry forecasts that if TSMC has currently secured a yield of 60%, it will likely achieve a mass production yield of over 70% in the remaining time. The fact that they are already expanding the 2-nanometer production lines is interpreted as a sign of confidence.
In the case of the 2-nanometer process, the existing transistor structure changes, significantly increasing development expenses and design complexity. Precise bonding and high wafer flatness are required, and as atomic layer deposition (ALD) processes become more advanced, it is known that replacing and setting up several key pieces of equipment used in the 3-nanometer process will be necessary. TSMC has set the price per wafer for the 2-nanometer process at $30,000, which is double the prices for 4-nanometer and 5-nanometer wafers.
Samsung Electronics' foundry division has effectively acknowledged the failures of the 3-nanometer gate-all-around (GAA) process it has been engaged in for the past few years and has set a policy to create a turning point starting from the 2-nanometer process. Hanjin Logistics, who newly took office this year as the head of the foundry division, is focusing on technological innovation and improving production efficiency as core priorities while enhancing strategic partnerships and improving market positioning.
Currently, Samsung Electronics' 2-nanometer yield is reported to be around 20% to 30%, but analyses suggest that this pace is faster compared to the 3-nanometer process, which struggled to secure yields over three years. With about 10 months remaining until the mass production timeframe, if they stabilize the mass production process within this period, there remains an opportunity to secure large-scale production orders around the same time as TSMC.
Previously, Samsung Electronics' foundry division started bringing in equipment to establish a 2-nanometer production line at its Hwaseong plant's foundry line 'S3' beginning in the fourth quarter of last year. The plan is to convert the existing 3-nanometer line, which can produce around 15,000 wafers per month based on 12-inch wafers, to the 2-nanometer process. It is expected that they will begin test production of the 2-nanometer chips for major clients as early as this year.
An industry official noted, "With TSMC's 2-nanometer yield rising faster than initially expected, Samsung Electronics' disadvantage seems inevitable, but Samsung Electronics is also developing the 2-nanometer process more stably compared to the 3-nanometer process," adding that "recently, the 4-nanometer process yield has risen to a maximum of 80%, showing technological improvements and presenting positive aspects."