Hardware technology has been developed that can solve the core challenge of the big data and artificial intelligence era—the "combinatorial optimization problem"—faster and more efficiently. A combinatorial optimization problem seeks the most efficient answer among countless possible cases and is directly connected to various industries, including logistics route design, financial portfolio construction, and semiconductor circuit placement.
KAIST said on the 6th that a joint research team led by Professors Choi Yang-gyu and Kim Sang-hyeon of the School of Electrical Engineering succeeded in implementing a next-generation optimization-dedicated hardware, an "oscillator-based Ising machine," using only standard silicon semiconductor processes. The research results were published in March in the international journal Science Advances.
An Ising machine is a special-purpose computer in which multiple elements interact to find an optimal solution. The research team focused on an "oscillator," which repeats signals at a fixed cycle. As multiple oscillators exchange signals and synchronize with each other, the system moves toward the most stable state and, through this, derives the optimal solution.
Conventional oscillator-based Ising machines faced constraints in solving complex problems because it is difficult to precisely control the minute frequency differences that occur in each element and because there are limits to the method of consolidation between elements.
To solve this, the research team implemented both the oscillators and the couplers that adjust the interaction strength between elements with single silicon transistors. This approach reduces frequency deviations between oscillators to enable stable synchronization and, through multi-state coupling that adjusts consolidation strength in multiple steps, allows the problem's weights to be reflected more precisely.
As a result, both the expressiveness of the Ising model and its solution-search performance improved simultaneously. Using this technology, the research team also succeeded in solving the representative combinatorial optimization problem of "maximum cut." Maximum cut is a problem that, when dividing a network into two groups, maximizes the consolidation between the two groups and is closely connected to various optimization problems in real industrial settings.
The biggest feature of this study is that it used, as is, the complementary metal-oxide semiconductor (CMOS) process widely used in the current semiconductor industry, rather than special materials or nonstandard processes. Accordingly, mass production and commercialization are expected to be possible on existing semiconductor production lines without additional facility investment.
Professor Choi Yang-gyu said, "This study is Ising machine hardware that secured both scalability and precision by implementing both oscillators and couplers with silicon devices," and added, "It can be applied to industrial fields that require large-scale combinatorial optimization, such as semiconductor design automation, communications network optimization, and resource allocation."
References
Science Advances (2026), DOI: https://doi.org/10.1126/sciadv.adz2384