A domestic research team has developed artificial intelligence (AI) technology that can significantly reduce the time required to design high-performance communication semiconductor circuits. The technology can handle design tasks that experts used to repeat for weeks to months in just over a day.
A joint team led by Professor Yun Hee-in of the Department of Electrical and Electronic Engineering at Ulsan National Institute of Science and Technology and Professor Song Dae-geon of Kyungpook National University said on the 5th it developed an AI model that automatically designs an LC voltage-controlled oscillator (LC-VCO), a communication circuit. The results were published online in April in the Institute of Electrical and Electronics Engineers (IEEE) journal "Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD)."
An LC-VCO is a core semiconductor circuit that generates frequencies in high-speed communication systems such as 5G. To reduce noise in communication signals and power consumption, multiple variables such as inductor and transistor sizes and interconnect structures must be precisely combined.
In particular, even if good performance is achieved in the schematic design, performance can change at the layout stage, which places the design on the actual chip. This is because "parasitic effects," unintended electrical influences, occur depending on wire width and device placement.
Unlike conventional methods that handled schematic design and layout design separately, the team's AI model jointly optimizes the two stages. In the circuit design stage, it uses Reinforcement Learning to find design combinations that meet the target frequency and performance conditions. Reinforcement Learning is a method in which AI tries multiple choices and learns on its own in the direction that yields better results.
In the layout stage, gradient descent was applied. Gradient descent is a method of finding an optimum by slightly adjusting design values in the direction that improves performance from the current state. Through this, the AI iteratively corrects physical design elements such as wire width and spacing.
For inductor design, which takes a long time in the design process, the team applied a prediction technique based on Deep Learning. Previously, repetitive electromagnetic simulations were required, but the researchers predicted them at the level of several ms (milliseconds), shortening the overall design time.
Experiments showed that a task that took about 119 hours with the conventional automatic design method was completed in 28.5 hours. The design time was reduced by more than 76%. The figure of merit (FoM), which comprehensively indicates circuit performance, also outperformed previous research.
Another advantage is that there is little need to retrain from scratch even if the process changes. By applying transfer learning, the team enabled AI trained on the 65 nm (nanometer, one-billionth of a meter) process to perform designs on the 40 nm and 28 nm processes by adding only about 10% of the existing training data.
The researchers said, "This technology will help improve the performance of frequency-generation circuits used in 5G and 6G Network communications and AI chips and lower design expense," adding, "It will also help alleviate the shortage of semiconductor design personnel and speed up the transition to next-generation processes."
The joint team plans to expand the technology beyond LC-VCOs to automate the design of various analog and RF circuits.
References
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2026), DOI: https://doi.org/10.1109/TCAD.2026.3680789