SK hynix outlined a technology roadmap that uses advanced logic foundry processes for the peripheral circuits of next-generation three-dimensional (3D) DRAM. The approach is to build DRAM cells, which store data, and the peripheral circuits, which control data input and output, with processes suited to each and then combine them. After SK hynix adopted TSMC's advanced logic process for sixth-generation HBM (high bandwidth memory), attention is on whether it will expand cooperation with external foundries for future 3D DRAM as well.
On the 15th, according to the semiconductor industry, SK hynix presented as key directions for next-generation 3D technology at the "2026 Future Forum" held on the 8th at the Icheon campus in Gyeonggi: ▲ maximizing data bus width ▲ ultra short reach transmission ▲ making DRAM peripheral circuits on logic foundry processes.
DRAM largely consists of memory cells that store data and peripheral circuits that write and read data to the cells or control addressing and input/output. Until now, it has been common to implement the two domains together within a single DRAM manufacturing process.
However, the process characteristics required by the two domains differ. Memory processes focus on reliably storing large amounts of data in a small area, whereas logic processes are strong at operating complex circuits quickly and with power efficiency. Building both domains in a single process creates constraints in optimizing the process for each domain's characteristics.
The "logic foundry-ization" presented by SK hynix is a direction to separate such peripheral circuits from memory cells and implement them with processes suited to logic. The memory cells are made with processes optimized for data storage, while the peripheral circuits are made with logic processes that excel in speed and power efficiency, and then connected. It does not mean outsourcing all DRAM production to a foundry.
Advances in 3D stacking and fine-pitch bonding technologies provide the foundation that enables such process separation. If memory and logic made with different processes are stacked vertically and connected, it is possible to use processes suited to each domain while shortening the physical distance between the two domains and widening the data pathways.
The spread of artificial intelligence (AI) is also increasing the need for this structure. As the data handled by AI accelerators surges, not only memory capacity but also how quickly and with how little power the stored data is delivered to the compute unit determines overall system performance. The reason SK hynix presented maximizing data bus width and ultra short reach transmission, along with making peripheral circuits on logic foundry processes, as core directions for 3D technology is in this context.
The combination of memory and advanced logic processes first materialized in HBM. SK hynix produced the base die with its own process up to HBM3E (fifth-generation HBM), but has been using TSMC's advanced logic process starting with HBM4 (sixth-generation HBM). SK hynix and TSMC formalized cooperation in 2024 on HBM4 development and next-generation packaging technology.
HBM stacks multiple DRAM dies vertically and exchanges data with compute units such as graphics processing units (GPU) through the bottommost base die. As HBM generations advanced, the control functions required of the base die became more complex and the need for customer-specific features grew, prompting SK hynix to start using advanced logic processes from specialized foundries beginning with HBM4.
In April this year, SK hynix also presented the integration of memory and logic technologies as a key direction for next-generation memory at the TSMC North America Technology Symposium. Ahn Hyun, SK hynix chief development officer (CDO), said integrating memory and logic technologies is a new breakthrough that can surpass the limits of existing architectures and boost AI performance. SK hynix also unveiled plans to expand related technologies starting with HBM4 to custom HBM, high bandwidth flash (HBF), and "3D stacked DRAM on logic."
It is also securing talent to combine 3D DRAM and logic. The SK hynix U.S. subsidiary is recruiting 3D stacked DRAM design talent and listed joint design of logic dies for 3D DRAM with U.S. customers as part of the role. The hiring includes developing digital intellectual property (IP) for 3D DRAM and collaborating with foundry partners.
As it gains experience using external foundries with HBM4 and expands logic-related development in 3D DRAM, there is talk that cooperation with companies such as TSMC could continue. However, SK hynix has not said it will apply TSMC processes to 3D DRAM, and experts currently do not see a high likelihood of using external foundries.
Kim Yang-paeng, a research fellow at the Korea Institute for Industrial Economics & Trade (KIET), said, "For 3D DRAM, the possibility of expanding cooperation with external foundries currently looks low," adding, "However, if there is a possibility of a product launch delay compared with competitors, the likelihood of external cooperation could increase."
The explanation is that an external foundry can be an option to compensate when in-house development speed is lacking. Samsung Electronics and SK hynix have long developed in-house technologies that combine memory and system functions, such as processing-in-memory (PIM), which adds compute functions to memory. Kim said, "If this part is outsourced, there is a possibility of shortening development time and increasing the pace of technology development."
While Samsung Electronics has both memory and foundry, SK hynix differs in that it can use external foundries as needed. However, analysts say it is hard to conclude which structure is more advantageous for next-generation DRAM development.
Kim said, "Results differ by product, and a model that had an initial advantage can later become a hindrance," adding, "This is not an issue of the boundary between memory and foundry blurring, but a model in which a memory company uses a foundry as needed."