An analysis said the axis of competition in the global artificial intelligence (AI) semiconductor market is shifting from fine process nodes to advanced packaging. Over the next five years, more than 130 million graphics processing units (GPUs) and application-specific integrated circuits (ASICs) for AI servers are expected to ship with advanced packaging that places processors and memory in close proximity.
Market research firm Counterpoint Research on the 20th projected that shipments of AI server GPUs and ASICs using advanced packaging that consolidates memory will exceed 130 million units over the next five years. Counterpoint also expected about $2 trillion in revenue to arise from demand for AI computing.
Counterpoint, in a recently released research note, said the main bottleneck in AI hardware is moving from "logic scaling," which shrinks semiconductor circuits, to advanced packaging. As computing performance accelerates, the performance of data transfer between memory and chips has failed to keep pace, making packaging technology more important.
Counterpoint grouped this into three limits: the "memory wall," the "performance wall," and the "copper wall." The memory wall is a phenomenon in which the speed of fetching data from memory becomes insufficient compared with the processing speed of the compute unit. The copper wall refers to the problem that as transmission speed and distance increase when consolidating chips with copper wiring, power consumption and signal loss grow.
In today's AI accelerators, it is common to place high bandwidth memory (HBM) close to the compute die. Counterpoint said TSMC's "CoWoS (chip on wafer on substrate)" method, which combines HBM with a large silicon interposer, is leading the market, but expense, production capacity, and the defect risk of large packages could be burdens. An interposer is a mid-substrate that consolidates multiple semiconductor chips within a single package.
Intel is pursuing a technology roadmap of EMIB to ZAM to XBM to address these packaging and memory consolidation issues. EMIB (Embedded Multi-die Interconnect Bridge) is Intel's advanced packaging technology that consolidates multiple semiconductor chips at high speed within a single package through small silicon bridges and is already commercialized. Instead of using a large silicon interposer the size of the entire package, it consolidates only the necessary sections between chips.
According to Counterpoint, Intel is developing "ZAM" in the midterm as an alternative for HBM4-class memory consolidation. Commercialization is targeted around 2028–2030. ZAM is being co-developed not with Samsung Electronics or SK hynix but with SoftBank subsidiary "SAIMEMORY."
SAIMEMORY was established in Dec. 2024. According to Counterpoint, Intel handles the technology institutional sector, SoftBank the finance institutional sector, and a University of Tokyo professor oversees the science institutional sector. It aims to produce prototypes by the 2027 fiscal year and pursue commercialization in the 2029 fiscal year. It is also supported by the New Energy and Industrial Technology Development Organization (NEDO), a Japanese government agency.
After 2030, it will also push "XBM." Counterpoint classified XBM as a long-term memory architecture redesign technology that uses thin-film transistors in the back-end-of-line stage of semiconductor processing. However, Counterpoint said it will be difficult for Intel's technology to replace existing HBM and TSMC's advanced packaging system in a short period. TSMC leads in mass-production experience, process maturity, and an ecosystem based on the JEDEC standard. It said Intel will need to secure customers and partners such as Google and MediaTek and solve thermal management and package integration issues to expand its market.
In June, Intel hired former SK hynix CEO Lee Seok-hee as senior vice president of the foundry institutional sector, tasking him with developing and manufacturing advanced packaging and back-end technologies. Rather than reentering direct memory wafer production, Intel is expanding its business between memory and compute semiconductors through advanced packaging and chip consolidation technologies.
Korean companies have a high share in the current HBM market. According to Counterpoint, in the first quarter of this year, global HBM market share was SK hynix 58%, Samsung Electronics 21%, and Micron 21%. Combined, SK hynix and Samsung Electronics account for about 80%. Samsung Electronics is pursuing a strategy to win AI customers by supplying HBM together with foundry services.
Counterpoint projected that as not only the performance of the compute die itself in AI Semiconductor but also how efficiently memory and the compute die are consolidated becomes important, competition over advanced packaging will intensify further.