Taiwan's TSMC, the world's largest foundry (contract chipmaker), said it will invest $29.4425 billion (about 42 trillion won) to expand advanced process and packaging capacity to meet demand for artificial intelligence (AI) chips. It will also set up a joint venture with Japan's Sony to develop and produce next-generation image sensors and invest about 282 billion yen (about 2.5 trillion won).
According to Taiwanese media on the 12th, TSMC's board approved a capital budget of $29.4425 billion the previous day to secure long-term production capacity. The investment will go toward expanding advanced process and advanced packaging capacity, upgrading mature and specialty processes, and building plants.
TSMC is steadily increasing investment in line with rising demand for chips for AI and high-performance computing (HPC). Last month, the company raised this year's capital expenditure outlook to $60 billion–$64 billion from $52 billion–$56 billion. Of that, 70%–80% will go to advanced processes, about 10% to specialty processes, and 10%–20% to advanced packaging, testing, and mask making.
The next-generation image sensor partnership pursued with Sony also took shape. The two companies will establish Advanced Vision Semiconductor Manufacturing in Kumamoto Prefecture, Japan, and begin mass production in 2029. Total investment will be 747 billion yen, with 465 billion yen from Sony and 282 billion yen from TSMC.
Sony will handle core image sensor technology development and product planning and design, while TSMC will provide advanced semiconductor process and manufacturing technology. The two companies signed a memorandum of understanding (MOU) in May to establish a joint venture for next-generation image sensor development and production, and at the time proposed expanding the scope of cooperation to the physical AI field, including automobiles and robots.
Advanced packaging capacity will also be expanded. TSMC's Chip on Wafer on Substrate (CoWoS) is a technology that connects compute chips such as graphics processing units (GPUs) and high bandwidth memory (HBM) in a single package, and it is used as a key step in producing AI accelerators.
TSMC is currently producing CoWoS at a 5.5-times reticle size. In 2028, it plans to mass-produce CoWoS at a 14-times reticle size that can place about 10 large compute dies and 20 HBM stacks in a single package. In 2029, it will expand to CoWoS beyond that size and to System-on-Wafer (SoW-X) technology at a 40-times reticle size.
TSMC is pushing large-scale investments in advanced processes and packaging at the same time because it believes AI chip orders from customers will continue for an extended period. In its second-quarter results last month, TSMC said AI-related demand is very strong and that it is receiving long-term demand signals from customers and cloud service providers (CSPs).