Samsung Electronics unveiled for the first time the next-generation three-dimensional (3D) memory "zHBM," which vertically stacks high bandwidth memory (HBM) on top of an artificial intelligence (AI) accelerator. The next-generation interface system applying zHBM provides up to eight times higher performance than HBM5, the eighth-generation HBM. Samsung Electronics also unveiled "zNAND-O," a high-performance NAND flash for On-device AI.
From the 4th to the 6th (local time), Samsung Electronics took part in "FMS (Future of Memory and Storage) 2026" at the Santa Clara Convention Center in California and unveiled mockups of zHBM and zNAND-O for the first time in the industry. A mockup is a model created to show a product's form and structure.
Samsung Electronics prepared an exhibition space of about 20 pyeong and set up a booth representing an AI cloud server. The exhibition hall was divided into ▲ Highlight ▲ cloud AI ▲ Edge AI zones, displaying about 30 products including DRAM, NAND flash, and storage devices.
On the first day of the event, Vice President Lee Jin-yeop of Samsung Electronics' Flash Development Office and Managing Director Kim Kyung-ryun of the DRAM Development Office delivered a keynote speech on the theme "3D architecture of memory and storage driving AI innovation." The two speakers presented a technology direction to enhance the performance and power efficiency of high performance computing (HPC) and AI infrastructure using zHBM and zNAND-O.
◇ Stacking HBM on top of AI accelerators… Shortening data travel distance
Unlike the existing structure that places HBM next to the AI accelerator xPU, zHBM stacks memory vertically on top of the accelerator. The key is to shorten the data travel distance between the processor and memory to increase bandwidth and power efficiency.
According to Samsung Electronics, the next-generation interface system applying zHBM provides up to eight times higher performance than HBM5. As the data travel distance shortens, performance per watt increases by up to three times and thermal resistance drops to less than half.
zHBM is being developed as a customizable 3D memory that allows customers to adjust product structures and functions. By adding design IP that implements specific functions to the interlayer placed between the memory and the AI accelerator, memory capacity can be expanded or the accelerator's performance can be supplemented.
Samsung Electronics plans to jointly optimize accelerator and memory structures with customers, including AI processor companies, to boost zHBM performance.
zNAND-O is a product that vertically stacks four or eight semiconductor chips by combining Through Silicon Via (TSV) technology with conventional vertical-structure NAND (V-NAND). The "O" at the end of the product name means it is optimized for On-device AI environments.
Samsung Electronics said zNAND-O can increase data storage capacity and loading bandwidth in a small space and shorten response time. It targets Edge AI and On-device AI devices that must process large volumes of data in real time.
◇ Unveiling 400-plus-layer V10 NAND… 58% improvement in density
Samsung Electronics also unveiled, for the first time in the industry, the 10th-generation V-NAND "V10 BV-NAND," which stacks cells in more than 400 layers. It has been 13 years since Samsung Electronics first announced V-NAND technology at the same event in 2013.
BV stands for "Bonding Vertical," a technology that separately manufactures the cell area where data is stored and the peripheral circuitry, then bonds them vertically. Samsung Electronics applied wafer bonding, which bonds two or more wafers vertically, and a "3-stack" technology that divides cells into three sections, manufactures them, and then connects them.
The density of V10 BV-NAND is about 58% higher than that of the previous generation, V9. It is designed to store more data in the same area, and its read/write performance and input/output (I/O) speed have also improved.
Separately manufacturing cells and circuits makes it easier to address process complexity and chip thickness issues that arise as the number of NAND layers increases. Samsung Electronics plans to respond to the high-performance, high-capacity NAND market by leveraging wafer bonding technology.
◇ From HBM4E and HBM5 to PIM and enterprise SSDs
At this event, Samsung Electronics also exhibited products for AI data centers and high performance computing, including ▲ HBM4E, the seventh-generation HBM ▲ HBM5, the eighth-generation HBM ▲ LPDDR5X-PIM ▲ PM1763 ▲ BM1773.
On Feb. 6, Samsung Electronics began mass production and shipment of HBM4, the sixth-generation HBM applying sixth-generation 10-nanometer-class (1c) DRAM and a 4-nanometer (nm) base die. On May 5, it supplied samples of the next-generation product HBM4E to customers.
At this exhibition, it showcased a next-generation AI platform and wafers applying HBM4E. It also unveiled an HBM5 mockup applying a new thermal management technology called "Heat Path Block (HPB)." HPB is a technology that secures a path to transfer heat generated inside HBM to the outside to increase bandwidth and stack capacity.
LPDDR5X-PIM is a product that adds compute functions inside memory. It reduces the repeated data movement between the processor and memory to increase processing speed and power efficiency.
PM1763, a next-generation enterprise solid-state drive (SSD), is a product that enhances fast read speed and data processing efficiency. BM1773 is an ultra-high-capacity enterprise SSD for storing large-scale AI training data.
Samsung Electronics plans to support customers from AI Semiconductor design through mass production based on a business structure that provides memory, system semiconductors, foundry, and advanced packaging together. The strategy is to jointly optimize processors, memory, and packaging to shorten product development time and improve performance and power efficiency.