Taiwanese foundry (contract chip manufacturing) company TSMC is reportedly moving to develop an advanced packaging technology similar to Intel's Embedded Multi-die Interconnect Bridge (EMIB). With demand for artificial intelligence (AI) chips surging and the existing CoWoS packaging technology unable to keep up with customer orders, the move is seen as an effort to prevent orders from shifting to Intel.
On the 3rd, Taiwanese outlets including the United Daily News and the Liberty Times reported, citing industry sources, that TSMC is developing a new packaging architecture with Taiwanese substrate maker Kinsus Interconnect Technology. Kinsus is said to be supporting the work of converting the technology from the research and development stage into a mass-producible structure.
Kinsus is a manufacturer of integrated circuit (IC) substrates for high-performance chips. It participates in the CoWoS supply chain for Nvidia and TSMC and is also known to supply substrates to AMD and Micron. CoWoS is a technology that places a graphics processing unit (GPU) or AI accelerator and high-bandwidth memory (HBM) on an interposer, a mid-layer connection plate, and then couples them with the package substrate. It can shorten data travel distances between multiple chips to improve processing speed and power efficiency, but as package size grows, interposer fabrication and assembly become more complex.
Intel's EMIB inserts small silicon bridges only where connections are needed between chips, instead of using a large silicon interposer that covers the entire package. Intel says EMIB has been in mass production since 2017, and that the next-generation EMIB-T adds through-silicon vias (TSVs) to improve power delivery.
A shortage of CoWoS supply is cited as the backdrop for TSMC's review of a new packaging architecture. Wei Zhejia, TSMC chair and chief executive officer (CEO), said at an earnings announcement on the 16th of last month that limited packaging capacity is constraining customers' growth, and welcomed other companies providing additional capacity.
Taiwanese chip designer MediaTek supports both TSMC's CoWoS and Intel's EMIB, letting customers choose the technology. Reuters reported that MediaTek is considering applying Intel EMIB to a custom AI Semiconductor designed for Google. Some in the industry see the lead time from CoWoS order to delivery having stretched to 52 to 78 weeks, with a significant portion of production slots filled through 2027.
TSMC is also expanding packaging capacity in parallel. The company raised this year's capital expenditure (CapEx) plan to $60 billion to $64 billion. It plans to allocate 10% to 20% of that to advanced packaging and testing, and mask making. In Taiwan, it plans to build 13 advanced process and packaging plants over the next several years.