At the AMD Advancing AI event at Moscone West in San Francisco on the 22nd (local time), Ravi Kuppuswamy, senior vice president of AMD Compute and Enterprise AI Solutions, explains EPYC Venice. /Courtesy of Hwang Min-gyu

AMD has declared the official mass production of its sixth‑generation server central processing unit (CPU), EPYC "Venice," built on a 2‑nanometer process. At the "AMD Advancing AI 2026" session held on the 22nd (local time) at Moscone West in San Francisco, AMD unveiled the detailed EPYC Venice lineup and presented benchmark results showing that, under the same conditions, its computational throughput is 2.2 times that of Nvidia "Vera," and its token processing speed is 1.8 times faster than Intel's sixth‑generation Xeon.

◇ In the age of agentic AI, CPUs emerge as the key variable

How people interact with AI is changing rapidly. In the past, it was common for users to ask a question and for AI to provide a one‑off answer, but recently "agentic AI," in which AI autonomously determines multiple steps, runs the necessary tools, and continues the task, has been spreading. CPUs, which had received relatively less attention than graphics processing units (GPUs), are reemerging as the key variable in data centers. That is because the performance of CPUs determines how to orchestrate countless AI agents and control, in real time, the sandbox environments in which they execute tasks.

Ravi Kuppuswamy, senior vice president for AMD compute and enterprise AI solutions, said at the session, "In the chatbot era, it was a linear structure that returned answers to user input, but the current agentic AI era is a structure in which multiple agents and tools operate organically," adding, "AMD's analysis of agentic workflows confirmed that a significant portion of the detailed tasks are directly tied to CPU compute performance."

Venice, for which mass production was officially released this time, is based on the next‑generation "Zen 6" and "Zen 6c" architectures and will be rolled out sequentially in four lineups depending on customer use cases. The first to arrive, the flagship "EPYC 9006 SP7," targets large data center operators as a top‑performance product and, with the Zen 6c architecture, supports up to 256 cores (512 threads). Notably, it is the first in the server CPU industry to support PCI Express (PCIe) Gen 6 and an ultra‑high memory bandwidth of 1.6 TB/s. SP7 has entered mass production and will ship starting in the fourth quarter of this year.

The cost‑efficient "SP8" is slated for the first half of 2027, while the "Venice‑X," specialized for HPC and data preprocessing, and the low‑power AI server "Verano" are expected to ship in the second half of 2027. Since the launch of the first‑generation EPYC in 2017, AMD has lifted its server CPU revenue share from just 0.2% to 46% as of the first quarter of 2026.

◇ Performance metrics ahead of Nvidia and Intel

EPYC Venice, a 2nm process-based server CPU announced for official mass production at AMD Advancing AI 2026 at Moscone West in San Francisco on the 22nd (local time). /Courtesy of Hwang Min-gyu

AMD on the day released benchmark results directly comparing Nvidia's recently unveiled next‑generation CPU "Vera" and Intel's Xeon platform. Under identical operating conditions, Venice (256 cores/600 W) delivered 2.2 times the computational throughput of Nvidia Vera (88 cores/450 W), and AMD said Venice held a 20% advantage even when comparing performance per core. At the rack level, a Venice‑based rack can house up to 49,152 cores per rack, giving it 2.2 times higher core density than a Nvidia Vera rack (22,528 cores). In GPU‑host node environments, token processing speed was 1.8 times faster than Intel's sixth‑generation Xeon.

AMD also presented concrete figures for the effect of replacing existing servers with Venice. The company stressed that the computational workload handled by 1,000 legacy servers introduced five years ago based on Intel Xeon Gold can be replaced with just 82 servers using Venice (EPYC 9996). In that case, data center power consumption can be reduced by up to 77%, and total cost of ownership (TCO) over five years can be cut by 40%.

Kuppuswamy, the senior vice president, said, "The sixth‑generation EPYC 'Venice' is the best CPU portfolio designed to fully support every area of a segmented AI data center," adding, "With overwhelming processing speed and ultra‑high memory bandwidth, it will further cement leadership in the next‑generation AI infrastructure market."

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