Lam Research, considered one of the world's largest semiconductor equipment companies, held an "advanced packaging" press briefing at the Westin Josun Seoul Parnas Hotel in Gangnam District on the 14th and said it will solve several technical challenges arising as high-bandwidth memory (HBM) structures become more complex.
To implement high-performance artificial intelligence (AI) services, massive parallel data must be processed quickly. In this process, memory processing speed has become even more important. As the amount of data required for AI computation has grown, a "memory wall" (Memory Wall, bottleneck) has occurred, where overall chip performance improvements slow because the processor finishes tasks quickly but stalls at the memory.
That is why high-bandwidth memory (HBM), which vertically stacks multiple DRAMs to dramatically boost data processing speed, has risen. HBM has been mounted on graphics processing units (GPUs) for AI and has now become an essential component for AI service development.
Lam Research said HBM, which plays an innovative role in implementing AI by overcoming the memory wall, is now facing new technical challenges. As AI advances into the inference domain, the need to process more data at faster speeds has increased, and accordingly, higher density and complexity are being demanded of HBM.
Lam Research said that as HBM performance increases, the technical difficulty required for "3D die stacking" (3D Die Stacking, a technology that vertically stacks multiple individual semiconductor chips and links them) and "high-density heterogeneous integration" (High-Density Heterogeneous Integration, a packaging technology that densely integrates semiconductor devices and elements made by different processes within a single package) is rising.
Chipping Lee, Lam Research's global head of advanced packaging technology, said at the briefing, "As stacking height and complexity increase, stress during processing rises, causing wafers to warp or deform," adding, "Various issues are also emerging, such as defects and production yield losses caused by cracks and voids in films." Lee added, "These issues make it difficult to achieve elements such as 'signal path optimization,' 'faster processing,' and 'smaller form factors.'"
◇ Launch of "Vector TEOS 3D"… "In mass production in the memory sector since a year ago"
Lam Research said it is confident it can solve newly emerging technical challenges in the HBM field with "packaging technology" (a back-end process that protects semiconductor chips from external environments and electrically connects them to substrates to send and receive signals). The company introduced "Vector TEOS 3D" (VECTOR TEOS 3D), launched in September, as the equipment to address these issues. While this deposition tool is currently used mainly in system semiconductor production to reduce voids, the company plans to increase supply to memory corporations.
Audrey Charles, executive vice president for corporate strategy and advanced packaging at Lam Research, did not specify supply volumes or customer names but said, "It has been applied to mass production for more than a year in logic and memory." Park Jun-hong, head of Lam Research Korea, also said, "In the HBM market, we expect equipment utilization to increase when hybrid bonding (a semiconductor packaging technology that directly bonds metal and dielectric simultaneously without bumps to connect chips) is applied, and we are looking for opportunities." This indirectly indicated that the company is supplying the equipment to HBM manufacturers such as Samsung Electronics and SK hynix.
Vector TEOS 3D is designed to enable stable packaging even on thick or warped wafers. It deposits a special dielectric film up to 60 μm (micrometers) thick between dies to serve as structural, thermal, and mechanical support. HBM must lay an insulating film at least 30 μm thick between dies. Charles said, "Through the industry's first single process, we implement thick films of 30 μm or more without defects."
Productivity has also improved. According to Lam Research, the tool offers more than 70% faster processing speed than the previous generation and can reduce costs by up to 20%. Chipping Lee said, "This equipment condenses 15 years of technology leadership in advanced packaging," adding, "We will continue our technology leadership in back-end equipment as well." Park also said, "While Lam Research is known as a powerhouse in etch (a front-end semiconductor process that forms circuit patterns through chemical corrosion), we have led innovation in advanced packaging semiconductor manufacturing processes for decades based on our equipment technology leadership in deposition and dielectric film."