SK hynix said on the 12th that it had completed development of the world's first HBM4 (sixth-generation high-bandwidth memory) and established a mass production system. SK hynix appears to have quickly set up mass production ahead of rivals to supply products on time, judging that it met the quality standards required by HBM4 customers such as Nvidia.
On the day, SK hynix explained that the newly mass-produced HBM4 applies 2,048 data transfer lanes (I/O), double the previous generation, doubling bandwidth and improving power efficiency by more than 40%. An SK hynix official said, "If HBM4 is adopted in customer systems, it can improve AI service performance by up to 69%, and it is expected to fundamentally resolve data bottlenecks while also significantly reducing data center power expense."
SK hynix applied its proprietary Advanced MR-MUF process and 10-nanometer-class fifth-generation (1b) DRAM technology to HBM4 development, minimizing risks in mass production. The company also said it achieved an operating speed of more than 10 Gbps (10 gigabits per second), far exceeding the HBM4 standard operating speed of 8 Gbps set by the JEDEC Solid State Technology Association (JEDEC).
The MR-MUF process involves injecting a liquid protective material into the spaces between stacked semiconductor chips to protect the circuits between chips, and then curing it. Compared with the method of laying a film-type material each time a chip is stacked, the process is considered more efficient and more effective for heat dissipation. SK hynix said that through Advanced MR-MUF, it can reduce the pressure applied when stacking chips compared with the existing process and also improve the ability to control warping that can occur when heat is transferred.
Kim Ju-seon, president of AI infrastructure at SK hynix, said, "HBM4, for which we officially announced the establishment of mass production for the first time in the world, is a symbolic turning point that pushes beyond the limits of AI infrastructure and a key product to solve technological challenges in the AI era," adding, "We will supply, in a timely manner, memory with the highest quality and a range of performance that the AI era demands."