Samsung Electronics aims to commercialize 9nm (nanometer, 1 billionth of a meter) DRAM within three years and plans to introduce the '4F²' DRAM structure, which changes the structure from horizontal to vertical. At the same time, it has been determined that the company will also proceed with the development of 9nm DRAM using the existing horizontal structure of 6F². Changing the DRAM structure to vertical increases design complexity and causes significant changes in the manufacturing process, leading to soaring production costs. It is reported that this approach aims to reduce costs and secure development time for the 4F² structure. Samsung Electronics plans to apply the 4F² DRAM structure starting with the next generation of 9nm (0a) DRAM, following the mass production of 10nm (nanometer, 1 billionth of a meter) 6th generation (1c, 11-12nm level) DRAM based on the 6F² structure set for this second half of the year.
DRAM stores data in cell units, the basic unit in which a single piece of digital information can be stored. The area occupied by a single cell is expressed as F². Until now, the 6F² cells, which have three vertical lines called bitlines and two horizontal lines called wordlines used for reading and writing data, have been common. However, from the DRAM process below 10nm, the miniaturization limits of the planar structure are becoming apparent. Therefore, to reduce the size of the DRAM while increasing density, a 4F² DRAM is being developed that reduces each to two lines and arranges the transistors that act as switches for the DRAM in a vertical structure.
According to the industry on the 22nd, Samsung Electronics is reported to be preparing the development of DRAM with the existing 6F² structure as well as the 4F² structure for 9nm (0a) DRAM development. Choi Jeong-dong, senior vice president at TechInsights, noted that "there are significant changes in design, processes, and manufacturing equipment during the mass production of vertical 4F² DRAM," and he explained, "If we advance the existing method, we can reduce the circuit line width without changing the design and equipment, which can also buy some time for the 4F² DRAM development, so we are evaluating the possibilities."
As generations evolve, finer processes are applied, resulting in narrower circuit widths in DRAM. This leads to a reduction in chip size and an increase in density, thus enhancing performance and power efficiency. Currently, Samsung Electronics, SK hynix, and Micron are competing with 10nm 4th generation (1a) and 10nm 5th generation (1b) DRAM as their main products, and they plan to begin mass production of 10nm 6th generation (1c) DRAM in the second half of this year.
However, forecasts indicate that from the DRAM process below 10nm, not only the manufacturing difficulty but also the manufacturing expense will rise sharply, making changes to the DRAM structure inevitable. For this reason, memory semiconductor corporations have chosen the strategy of changing the DRAM structure from planar to vertical to improve performance and power efficiency. It is known that Samsung Electronics plans to launch 4F² structure DRAM in the next generation after the 10nm 7th generation (1d) DRAM product, while SK hynix is preparing to launch it one generation later. Given that Samsung Electronics is developing this one generation ahead of SK hynix, it is reported that the company is keeping all possibilities open and evaluating them.
An official in the semiconductor industry said, "There is also a plan to develop the 0a generation using the existing 6F² structure with a process applied at a level of 9.8nm, and to develop the next generation with a 9.0nm process using the 4F² structure," adding, "this will be decided after development and evaluation."
Samsung Electronics is expected to complete development and begin supplying samples of the relevant products to client companies as early as 2027, with plans to achieve mass production within three years. An official in the semiconductor industry noted, "There is a growing sense of crisis internally that Samsung Electronics has not been able to secure an advantage over its competitor SK hynix since the launch of 10nm 4th generation (1a) DRAM products," and explained, "In the next generation of DRAM, we are establishing various development directions to bridge the gap with competitors in the DRAM market."